Custom Layout Designer (Analog Layout Designer)

Cadence; Cary (NC); On-site; USD 90,000 - 130,000; Full time

Job summary

Cadence seeks a layout engineer to produce high quality analog/mixed-signal layouts and guide back-end flow from floorplanning to verification. You will collaborate with circuit designers and global layout teams, applying Cadence tools to meet tight schedules and performance targets.

Candidates should have BSEE or MSEE, strong analog layout knowledge, and hands-on experience with Cadence Virtuoso; excellent communication and teamwork are essential.

Qualifications

• BSEE and/or MSEE required.
• Exposure to microelectronics design and requirements.
• Understanding layout effects on circuit speed, capacitance, power and area.
• Knowledge of analog layout techniques like matching and shielding.
• Experience with Cadence Virtuoso Layout and physical verification tools.
• Team player with good communication and customer service skills.

Responsibilities

• Implement high-speed, high-accuracy cells, blocks and IPs with quality and efficiency.
• Collaborate with global layout designers to build IPs and test-chips.
• Work with circuit designers to understand technical and scheduling needs.
• Coordinate with R&D teams to improve layout editing and verification tools.

Skills

BSEE

MSEE

Microelectronics exposure

Layout techniques

Education

BSEE

MSEE

Tools

Cadence Virtuoso

PVS

Job description

At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.

Join our team of layout designers creating challenging IP designs for the consumer, industrial, and automotive markets. Our designs are fabricated in the world's leading edge silicon processes for companies ranging from large multinational companies to hot start-ups. Learn on-the-job how to apply your engineering background to create these robust high performance analog designs. Working with experienced skilled designers, you will be part of the design team using Cadence design tools.

We are looking for a layout engineer capable of producing quality layouts of analog/mixed-signal circuit blocks, working in collaboration with circuit designers. Responsibilities include all facets of the back-end flow, from initial floor planning through detailed layout and final verification of conformance to foundry design rules.

The Cadence IP Group custom layout team develops and delivers a variety of high-quality high speed and high accuracy CMOS integrated circuits IP for several foundries and process nodes down to 5 n and even below. We are deeply involved in finfet layout and even beyond (gate all-around).

As part of Cadence, the Cadence IP group custom layout team not only has access to all the current and future Cadence layout and verification tools, we also participate in the development and validation of the Cadence Virtuoso software, which the most used in the industry.

As a custom layout designer, you will be involved in:

• Implementing high speed and high accuracy cells, blocks and IP blocks in a timely fashion with high quality and efficiency
• Working with custom layout designers from groups all over the world to build high quality IP and test-chips
• Working with circuit designers from groups all over the world to understand their technical and schedule needs
• Collaborating with the Cadence R&D teams (Virtuoso, PVS developers) to help develop the layout editing and verification tools

Qualifications and Skills

• BSEE, MSEE
• Exposure to microelectronics design and requirements
• Understanding of layout effects on the circuit such as speed, capacitance, power and area etc.,
• Knowledge of various analog layout techniques like matching, shielding etc.,
• Exposure to Cadence Virtuoso Layout and physical verification tools
• Team player, driven, self-motivated and autonomous
• Excellent communication, presentation and customer service skills

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