Senior Custom ASIC Lead — Cross‑Functional Tapeout Expert

Broadcom Inc.; San Jose (CA); On-site; USD 143,800 - 230,000; Full time

Benefits offered by this job

Medical, dental and vision plans

401(k) with company matching

Employee Stock Purchase Program (ESPP)

Employee Assistance Program (EAP)

Company paid holidays

Paid sick leave and vacation

Job summary

Broadcom Inc. is seeking a senior engineer to lead external and internal cross‑functional teams across physical design, STA, DFT, and packaging for ASICs in AI, HPC, networking, and storage.

You will guide customers from inception to production, assess risks, and publish best‑practice notes for future designs. You will collaborate with marketing, sales, legal and regulatory teams while staying current on Broadcom IPs and technology.

Qualifications

• Bachelor's degree with 12+ years of related experience or Master's with 10+ years.
• Multiple tape‑outs in advanced technology nodes.
• Experience with PPA tradeoffs and low power design.
• Hands‑on experience in physical design, STA, EDA tools, and packaging.

Responsibilities

• Manage external customer ASIC programs from inception to finish (RFQs, technology/IP collaterals, design, test, packaging, fabrication, bring‑up, production).
• Advise customers on best practices in EDA, flows and design methodologies; organize Q&A sessions with Broadcom tech experts.
• Plan ahead to mitigate design quality risks and schedule impacts with cross‑functional teams.
• Execute physical design flows to ensure tape‑in netlists meet Broadcom tape‑out quality standards.
• Stay current with Broadcom IPs, technologies and end‑user applications; engage with marketing, sales, legal and regulatory teams.

Skills

Tape‑out experience

PPA tradeoffs analysis

Low power design

Physical design & STA

EDA tools & design flows

Verilog RTL coding

TCL and shell scripting

Education

Bachelor's degree + 12+ years

Master's degree + 10+ years

Job description

Broadcom Inc. is seeking a senior engineer to lead external and internal cross‑functional teams across physical design, STA, DFT, and packaging for ASICs in AI, HPC, networking, and storage.

You will guide customers from inception to production, assess risks, and publish best‑practice notes for future designs. You will collaborate with marketing, sales, legal and regulatory teams while staying current on Broadcom IPs and technology.