Senior Custom ASIC Lead - AI/HPC, Equity Eligible

Broadcom

Fort Collins (CO)

On-site

USD 144,000 - 230,000

Full time

14 days+
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Job summary

Broadcom is seeking a senior engineer to lead external and internal cross-functional teams on ASIC physical design, STA, DFT, and packaging. You will guide customer teams designing chips in AI, HPC, networking, and storage, drive risk mitigation, and influence design practices with Broadcom experts.

Join Broadcom’s Infrastructure chip division to push technology frontiers with global customers, manage tape-out quality, and contribute to ongoing IP and end-user application developments.

Qualifications

  • Bachelors degree and 12+ years of related experience; or Masters degree and 10+ years of related experience

Responsibilities

  • Manage external customer ASIC programs from inception to finish, including RFQs, technology and IP collaterals, design, test, packaging, fabrication, bring-up and production
  • Advise customers on best practices in EDA, flows and design methodologies, and by organizing Q&A sessions with Broadcom technology experts
  • See ahead, plan ahead, work ahead. Proactively assess potential risks to the design quality and project schedule, then work with cross-functional teams to prepare and execute risk mitigation actions
  • Execute physical design flows to check that incoming customer tape-in netlists meet Broadcom’s stringent tape-out quality standards
  • Motivate and drive yourself to stay abreast of developments in Broadcom IPs, technology and end user applications
  • Participate in discussions about your chips with marketing, sales, legal and regulatory compliance teams
  • Be a consummate team player and assist other teams in need

Skills

Physical design
STA
DFT
Packaging
Leadership
TCL scripting
Risk mitigation
RFQ management
Verilog RTL

Education

Bachelor's degree +12+ years
Master's degree +10+ years

Tools

EDA tools
Design flows

Job description

Broadcom is seeking a senior engineer to lead external and internal cross-functional teams on ASIC physical design, STA, DFT, and packaging. You will guide customer teams designing chips in AI, HPC, networking, and storage, drive risk mitigation, and influence design practices with Broadcom experts.

Join Broadcom’s Infrastructure chip division to push technology frontiers with global customers, manage tape-out quality, and contribute to ongoing IP and end-user application developments.

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