Senior ASIC Verification Engineer - SoC/IP for Data Center

AnySilicon; Sunnyvale (CA); On-site; USD 150,000 - 190,000; Full time

Job summary

Meta in Sunnyvale, CA is seeking an experienced ASIC Design Verification Engineer to join its Infrastructure organization, focusing on developing IP and SoC solutions for data center applications. This role involves collaborating with cross-functional teams to ensure high-quality design verification and successful silicon outcomes.

The position requires 8+ years of IP/sub-system or SoC verification, with expertise in SystemVerilog UVM/OVM and C/C++ verification, plus scripting skills in

Qualifications

• 8 years of IP/sub-system or SoC level verification experience using SystemVerilog UVM/OVM or C/C++ verification.
• Experience in functional verification of Ethernet, 400G MAC, NIC, RDMA, and related technologies.
• Proficiency in architecting and implementing verification infrastructure and executing the full verification cycle.
• Scripting proficiency in Python, Perl, or TCL for building verification tools and workflows.
• Experience debugging complex verification challenges in IP or SoC designs.
• Collaboration experience with design, emulation, and silicon validation teams.

Responsibilities

• Define and implement IP/SoC verification plans and build verification test benches.
• Develop functional tests based on the verification test plan.
• Drive Design Verification to closure based on defined metrics, including functional and code coverage.
• Debug and resolve functional failures in collaboration with the Design team.
• Work with cross-functional teams to ensure design quality meets verification goals.
• Implement continuous improvements in Design Verification using the latest methodologies and tools.

Skills

SystemVerilog UVM

C/C++ verification

Python scripting

Debugging

Cross-functional collaboration

Ethernet verification

Job description

Meta in Sunnyvale, CA is seeking an experienced ASIC Design Verification Engineer to join its Infrastructure organization, focusing on developing IP and SoC solutions for data center applications. This role involves collaborating with cross-functional teams to ensure high-quality design verification and successful silicon outcomes.

The position requires 8+ years of IP/sub-system or SoC verification, with expertise in SystemVerilog UVM/OVM and C/C++ verification, plus scripting skills in