Senior ASIC Verification Architect for Data Center

Cisco Systems, Inc; San Jose (CA); On-site; USD 168,000 - 245,000; Full time

Benefits offered by this job

Health insurance

401(k) with match

Parental leave

Disability coverage

Life insurance

RSU grants

Paid time off

Job summary

Cisco Systems, Inc. is seeking an experienced ASIC Design Verification Engineer to help define, design and verify high‑performance ASICs for data center platforms.

You will drive verification methodologies, build and maintain DV environments, and lead cluster/chip level verification efforts across complex projects. You will also develop test plans, constrained-random and directed stimuli, and ensure thorough coverage.

Qualifications

• Bachelor's or Master's degree in Computer, Electrical, or Electronics Engineering.
• 7+ years of relevant ASIC design and verification experience.
• Experience with SystemVerilog or UVM methodology.
• Experience leading verification teams or assignments/projects.
• Experience with scripting using Perl and/or Python.

Responsibilities

• Define, design and verify ASIC and ASIC subsystems for Cisco platforms.
• Develop new verification methodologies and reusable code for future projects.
• Lead design verification efforts, resolve architectural concerns, and drive reviews.
• Architect and maintain DV environments for cluster and chip levels.
• Build DV environments from scratch and implement test plans and stimuli.
• Ensure coverage through code and functional coverage; run Gate Level simulations.
• Support design testing in emulation environments and assist lab bring-up.

Skills

OOP concepts

SystemVerilog/UVM

Leadership experience

Perl/Python scripting

Education

Bachelor's degree in Computer, Electrical or Electronics Engineering

Master's degree in Computer, Electrical or Electronics Engineering

Tools

Veloce

Palladium

Zebu

HAPS

IEV

VC Formal

Job description

Cisco Systems, Inc. is seeking an experienced ASIC Design Verification Engineer to help define, design and verify high‑performance ASICs for data center platforms.

You will drive verification methodologies, build and maintain DV environments, and lead cluster/chip level verification efforts across complex projects. You will also develop test plans, constrained-random and directed stimuli, and ensure thorough coverage.