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Meta in Santa Clara, CA is seeking an experienced ASIC Design Verification Engineer to join its Infrastructure team, focusing on IP/SoC verification for data center applications. You will develop verification plans, build test benches, and drive closure with metrics across PCIe, DDR, and Ethernet IP to ensure design quality.
You will collaborate with cross-functional teams, implement UVM-based verification environments from scratch, and leverage Python/TCL/Shell scripting to create robust
Meta in Santa Clara, CA is seeking an experienced ASIC Design Verification Engineer to join its Infrastructure team, focusing on IP/SoC verification for data center applications. You will develop verification plans, build test benches, and drive closure with metrics across PCIe, DDR, and Ethernet IP to ensure design quality.
You will collaborate with cross-functional teams, implement UVM-based verification environments from scratch, and leverage Python/TCL/Shell scripting to create robust