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Hewlett Packard Enterprise is seeking a Senior ASIC Design Verification Engineer to help verify the Slingshot interconnect for HPC/AI systems. The role combines pre-silicon verification leadership with hands-on SystemVerilog/UVM testbench development and coverage-driven verification.
The position is hybrid, requiring an average of 2 days per week in a local office, with work locations including Chippewa Falls, WI; Fort Collins, CO; or Bloomington, MN.
Hewlett Packard Enterprise is seeking a Senior ASIC Design Verification Engineer to help verify the Slingshot interconnect for HPC/AI systems. The role combines pre-silicon verification leadership with hands-on SystemVerilog/UVM testbench development and coverage-driven verification.
The position is hybrid, requiring an average of 2 days per week in a local office, with work locations including Chippewa Falls, WI; Fort Collins, CO; or Bloomington, MN.