Senior ASIC Verification Engineer — Hybrid/Onsite

Links Technology Solutions, Inc.; Carlsbad (CA); Hybrid; USD 96,000 - 110,000; Full time

Benefits offered by this job

Health insurance

Life insurance

Vision insurance

Dental insurance

401K Matching

Job summary

Links Technology Solutions, Inc. in Carlsbad, CA is seeking an ASIC Verification Engineer to develop UVM-based environments and verification plans for next‑gen SoCs.

You will craft assertions, traffic generators, agents, and scoreboards, collaborating with design and software teams to ensure robust testability. The role demands 5–12 years of industry experience, strong SystemVerilog and UVM skills, and a track record in end‑to‑end verification across block to system levels.

Qualifications

• Bachelor’s degree in Electrical Engineering or related field.
• 5–12 years of industry experience in ASIC/SoC verification.
• Proficiency in SystemVerilog, UVM, and verification planning.

Responsibilities

• Develop and implement UVM-based verification environments.
• Create verification plans at block and system levels.
• Design verification components: assertions, traffic generators, agents, scoreboards.
• Collaborate with cross-functional teams to evaluate testability and verification needs.
• Lead debug efforts and provide solutions for complex technical challenges.

Skills

UVM

SystemVerilog

C programming

Python scripting

Test planning

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical/Communications Engineering

Tools

Verilog

VHDL

Python

Perl

UVM automation tools

Job description

Links Technology Solutions, Inc. in Carlsbad, CA is seeking an ASIC Verification Engineer to develop UVM-based environments and verification plans for next‑gen SoCs.

You will craft assertions, traffic generators, agents, and scoreboards, collaborating with design and software teams to ensure robust testability. The role demands 5–12 years of industry experience, strong SystemVerilog and UVM skills, and a track record in end‑to‑end verification across block to system levels.