Senior ASIC Verification Architect (Onsite, CA)

Arrow Electronics; San Jose (CA); Vor Ort; USD 150.000 - 210.000; Vollzeit

Benefits dieser Stelle

Medical, Dental, Vision

401k with Matching Contributions

Disability Insurance

HSA/HRA Options

Paid Time Off

Tuition Reimbursement

Growth Opportunities

Zusammenfassung

eInfochips designs verification environments and architectures for ASIC SoCs. The role focuses on SV/UVM, AXI, NOC, Ethernet, PCIe, and UCIe interfaces, with ARM/RISC-V CPU knowledge and C/C++ test development.

The candidate will architect verification plans, develop self-checking test benches, and drive regression and coverage closure on multi-million gate tapeouts. On-site in San Jose, CA, with opportunities to lead verification methodology and script automation efforts across complex SoC

Qualifikationen

• Architect verification environment for ASIC SoC and provide verification support from plan to tapeout.
• Develop complex self-checking test benches with constraint random stimulus generation.
• Architect SoC test FW and create test plan documentation for ASIC features.
• Develop and debug SoC platform test FW and tests in C/C++.

Aufgaben

• Implement and maintain end-to-end formal verification flow for formal verification objectives.
• Develop/modify scripts to automate verification processes.
• Develop verification environment including environment assumptions, assertions, and cover properties.

Kenntnisse

SV/UVM

AXI

PCIe

Ethernet

UCIe

ARM/RISC-V

C/C++

Testbench development

Verification flow

Regression & Coverage

Ausbildung

Bachelor's degree or equivalent

Jobbeschreibung

eInfochips designs verification environments and architectures for ASIC SoCs. The role focuses on SV/UVM, AXI, NOC, Ethernet, PCIe, and UCIe interfaces, with ARM/RISC-V CPU knowledge and C/C++ test development.

The candidate will architect verification plans, develop self-checking test benches, and drive regression and coverage closure on multi-million gate tapeouts. On-site in San Jose, CA, with opportunities to lead verification methodology and script automation efforts across complex SoC