Senior ASIC Verification Architect - UVM & Formal

USA Tech Recruit; City of Rochester (NY); Sur place; USD 180 000 - 240 000; Plein temps

Résumé du poste

USA Tech Recruit is partnering with a leading networking and telecommunications company to hire a Principal Digital Verification Engineer near Rochester, NY. The role focuses on driving verification strategies across next-generation ASIC products, with responsibilities spanning architecture review, verification planning, and prime- level leadership.

Ideal candidates will bring 12+ years of digital verification experience, strong debugging skills, and familiarity with Python/C++/Git/Jira.

Qualifications

• 12+ years of digital verification experience using SystemVerilog, UVM, SVA, and major vendor simulators.
• Proven ability to define and execute comprehensive digital verification and coverage strategies.
• Strong debugging skills with a methodical approach to complex technical problems.
• Experience with formal verification methods advantageous.
• Familiarity with DSP and/or Forward Error Correction (FEC) technologies a plus.
• Experience with Python, C/C++, Git, and Jira desirable.

Responsabilités

• Analyse project architecture and functional requirements in collaboration with systems engineers and architects.
• Validate digital subsystems using simulation, formal verification, and coverage methodologies.
• Create, review, and optimise simulation environments, test scenarios, functional coverage plans, and formal verification test plans.
• Lead focused technical initiatives and mentor team members as required.
• Direct verification activities as an ASIC Verification Prime when assigned.
• Participate in architectural and design reviews to identify verification impacts and coverage opportunities.

Connaissances

Digital verification experience

Leadership / mentoring

Outils

SystemVerilog

UVM

SVA

Formal verification

Python

C/C++

Git

Jira

Description du poste

USA Tech Recruit is partnering with a leading networking and telecommunications company to hire a Principal Digital Verification Engineer near Rochester, NY. The role focuses on driving verification strategies across next-generation ASIC products, with responsibilities spanning architecture review, verification planning, and prime- level leadership.

Ideal candidates will bring 12+ years of digital verification experience, strong debugging skills, and familiarity with Python/C++/Git/Jira.