Senior ASIC Verification Engineer: SystemVerilog & UVM Expert

NVIDIA Corporation; Austin (TX); On-site; USD 136,000 - 212,750; Full time

Benefits offered by this job

Generous benefits package

Equity options

Industry-leading salaries

Job summary

A leading technology company in Austin is seeking an experienced ASIC Verification Engineer to work on system-level IP projects. Candidates should have a strong background in verification methodologies, with expertise in System Verilog and UVM. This position offers a competitive salary based on experience and location, as well as equity and benefits. Join a team that values creativity and technology passion.

Qualifications

• 3 years of relevant experience in ASIC verification.
• Proficient in OOPS based programming.

Responsibilities

• Design and maintain the unit level/sub-system Verification environment.
• Understand the architecture specifications and develop the test plan.
• Create UVM components, sequences, tests, and scoreboards.
• Sign off on verification efforts with high-quality code and functional coverage.
• Collaborate with architects, designers, and software engineers.

Skills

System Verilog

UVM

Python

RTL design (Verilog)

Computer architecture fundamentals

Education

Bachelor's or Master's degree in Computer or Electrical Engineering

Tools

VCS or equivalent simulation tools

Debug tools like Verdi

Job description

A leading technology company in Austin is seeking an experienced ASIC Verification Engineer to work on system-level IP projects. Candidates should have a strong background in verification methodologies, with expertise in System Verilog and UVM. This position offers a competitive salary based on experience and location, as well as equity and benefits. Join a team that values creativity and technology passion.