SoC Verification Architect – SV/UVM, Onsite CA

Arrow Enterprise Computing Solutions; San Jose (CA); On-site; USD 120,000 - 180,000; Full time

Benefits offered by this job

Medical, Dental, Vision Insurance

401k, With Matching Contributions

Short-Term/Long-Term Disability

HSA/HRA Options

Paid Time Off

Tuition Reimbursement

Growth Opportunities

And more!

Job summary

Arrow Enterprise Computing Solutions in San Jose, CA seeks a Design Verification Engineer (eInfochips Inc) to architect and implement verification environments for ASIC/SoC, defining verification plans and supporting multi-million gate tapeouts.

You will develop self-checking test benches, constrained random stimulus, and drive regression and coverage closure while collaborating on methodology development and automation scripts.

Qualifications

• Architect verification environment for ASIC/SoC and support tapeouts.
• Develop complex self-checking test benches with constrained random stimulus.
• Architect SoC test firmware and create test plan documentation.
• Develop and debug SoC ASIC platform test FW and tests in C/C++.

Responsibilities

• Strong SV/UVM expertise.
• AXI/NOC/Ethernet/PCIe/UCIe Switch expertise is needed.
• CPU ARM/RISC-V with C knowledge.
• Regression & Coverage Closure.

Skills

SV/UVM expertise

AXI/NOC/ Ethernet / PCIe / UCIe switch

CPU ARM/RISC-V with C knowledge

Regression & Coverage Closure

Job description

Arrow Enterprise Computing Solutions in San Jose, CA seeks a Design Verification Engineer (eInfochips Inc) to architect and implement verification environments for ASIC/SoC, defining verification plans and supporting multi-million gate tapeouts.

You will develop self-checking test benches, constrained random stimulus, and drive regression and coverage closure while collaborating on methodology development and automation scripts.