Senior ASIC Formal Verification Engineer – SoC/Data Center

Meta; Sunnyvale (CA); On-site; USD 178,000 - 250,000; Full time

Benefits offered by this job

Equity

Bonus

Job summary

Meta is seeking an ASIC Formal Verification Engineer to help build IP and SoC for data center applications. You will create formal testplans, drive sign-off for complex blocks, and collaborate with ASIC design, emulation, and post-silicon teams to ensure first-pass silicon success.

The role emphasizes leadership in formal verification methodologies and the development of scalable environments, with opportunities to mentor others and influence tool selection.

Qualifications

• 8+ years of Design Verification experience.
• 5+ years in Formal Verification.
• Experience with Datapath, sequential equivalence, Xprop, Clock Gating, connectivity.
• Understanding of Formal Verification methodologies and abstraction techniques.
• Ability to craft novel solutions for complex designs.
• Collaborates with design, architecture, and software teams to meet milestones.
• Proficiency in SystemVerilog and SVA.

Responsibilities

• Provide technical leadership in Formal Verification.
• Define scope, build formal environments, and close coverage at IP/SoC level.
• Develop reusable verification environments and advocate methodologies.
• Evaluate and recommend EDA tools for formal verification.
• Provide training and mentoring on formal verification technologies.

Skills

Formal Verification

SystemVerilog

SVA

Python scripting

Cross-functional collaboration

Analytical thinking

Clock domain crossing

IP/SoC verification

Education

Bachelor's degree in Computer Science/Engineering

Tools

JasperGold

VC-Formal

SystemVerilog tooling

Python, Perl, Tcl

Job description

Meta is seeking an ASIC Formal Verification Engineer to help build IP and SoC for data center applications. You will create formal testplans, drive sign-off for complex blocks, and collaborate with ASIC design, emulation, and post-silicon teams to ensure first-pass silicon success.

The role emphasizes leadership in formal verification methodologies and the development of scalable environments, with opportunities to mentor others and influence tool selection.