Senior Wireless SoC Architect & RTL Engineer

Apple; San Diego (CA); On-site; USD 171,600 - 302,200; Full time

Benefits offered by this job

Comprehensive medical coverage

Retirement benefits

Discounted products

Job summary

A leading tech company in San Diego is looking for an experienced engineer to develop microarchitecture and RTL for SoC design. This role requires a minimum of 10 years in ASIC design, with expertise in performance trade-offs and cross-functional teamwork. Candidates should have a BS degree and knowledge of the ASIC design flow, including System Verilog. Competitive compensation and comprehensive benefits are offered, alongside opportunities for stock ownership and educational reimbursement.

Qualifications

• 10+ years of relevant industry experience in ASIC design.
• Skilled in performance, power, and area trade-offs.
• Knowledgeable about ASIC design flow and implementation.

Responsibilities

• Define microarchitecture collaboratively with architecture and teams.
• Implement RTL adhering to design checks and requirements.
• Collaborate on verification and validation across all phases.
• Support pre-silicon verification and firmware development.
• Assist in post-silicon validation and debugging.

Skills

ASIC microarchitecture

System Verilog

Pre-silicon verification

Cross-functional collaboration

Education

BS degree

Tools

Lint

CDC

RDC

Synthesis

STA

Job description

A leading tech company in San Diego is looking for an experienced engineer to develop microarchitecture and RTL for SoC design. This role requires a minimum of 10 years in ASIC design, with expertise in performance trade-offs and cross-functional teamwork. Candidates should have a BS degree and knowledge of the ASIC design flow, including System Verilog. Competitive compensation and comprehensive benefits are offered, alongside opportunities for stock ownership and educational reimbursement.