Senior ASIC Power Engineer for ML Accelerators & Equity

Google LLC; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Job summary

Google is seeking an ASIC Power Engineer for ML accelerators in Sunnyvale to shape the power efficiency of TPUs. You will verify complex digital designs, focusing on TPU architecture and its integration within AI/ML systems, and drive power models from design through post-silicon stages.

In this role you will define and deploy power optimization techniques, contribute to power management architectures, and work with software and system teams to meet aggressive power goals for data-center

Qualifications

• Bachelor's degree or equivalent practical experience in Electrical Engineering, Computer Engineering, CS, or related field.
• 8+ years of experience in silicon design or architecture (logic design, power architecture, performance, or SoC design).
• Experience with power design, power modeling, power architecture, or power reduction methodologies/techniques.

Responsibilities

• Contribute to design power modeling and drive convergence to power goals.
• Investigate, specify, and deploy architectural and microarchitectural power optimization techniques.
• Define best practices and methodologies to achieve low-power designs.
• Collaborate with cross-functional software and system teams to create novel power management architectures to meet power goals.

Skills

Power design

Power modeling

Power architecture

DVFS knowledge

SoC design

Verilog

SystemVerilog

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

Verilog

SystemVerilog

Job description

Google is seeking an ASIC Power Engineer for ML accelerators in Sunnyvale to shape the power efficiency of TPUs. You will verify complex digital designs, focusing on TPU architecture and its integration within AI/ML systems, and drive power models from design through post-silicon stages.

In this role you will define and deploy power optimization techniques, contribute to power management architectures, and work with software and system teams to meet aggressive power goals for data-center