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Micron Technology, Inc. in Minneapolis, MN, is seeking a Principal Engineer to lead ASIC physical design for DRAM tester solutions.
The role covers full‑chip and block‑level closure, low‑power implementation, timing, power, and SI signoff, with tape‑out across advanced nodes. You will drive floorplanning, placement, CTS, routing, and timing closure using STA tools, while mentoring cross‑functional teams and advancing APR flows for PPA improvements.
Micron Technology, Inc. in Minneapolis, MN, is seeking a Principal Engineer to lead ASIC physical design for DRAM tester solutions.
The role covers full‑chip and block‑level closure, low‑power implementation, timing, power, and SI signoff, with tape‑out across advanced nodes. You will drive floorplanning, placement, CTS, routing, and timing closure using STA tools, while mentoring cross‑functional teams and advancing APR flows for PPA improvements.