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Micron Technology, Inc. is seeking an experienced ASIC physical design engineer in Minnesota to drive full-chip design closures, low-power implementations, and signoff across advanced nodes.
You will lead floorplanning, placement, CTS, routing, and tape-out for complex processors and memory interfaces. The role requires 15+ years in ASIC physical design, strong UPF/CPF, multi-voltage techniques, and proficiency in Tcl/Perl/Python for automation.
This position supports Micron’s DRAM Tester Solutions group, focusing on physical design implementation for processors, controller architectures, and ASICs. The role is responsible for full‑chip and block‑level physical design closure, low‑power implementation, timing, power, and signal integrity signoff, and successful tape‑out across advanced technology nodes.
Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.
Micron Prohibits the use of child labor and complies with all applicable laws, rules, regulations, and other international and industry labor standards.
Micron does not charge candidates any recruitment fees or unlawfully collect any payment from candidates as consideration for their employment with Micron.