ASIC Digital Design Engineer — RTL & Memory Controllers

Micron Technology; Minneapolis (MN); On-site; USD 86,000 - 146,000; Full time

Job summary

Micron Technology in Minneapolis is seeking an ASIC Digital Design Engineer to contribute to RTL design for DRAM memory controllers and subsystems. You will work across design implementation, simulation, validation, and chip bring-up, leveraging AI-enabled tools to improve productivity.

The role requires 0-2 years experience in digital design or ASIC development, a degree in Electrical or Computer Engineering, and knowledge of SystemVerilog, verification methods, and high-speed interfaces.

Qualifications

• Bachelor's or Master's degree in Electrical or Computer Engineering or related field.
• 0–2 years of digital design/ASIC RTL experience from internships or projects.
• Strong SystemVerilog knowledge and RTL development.
• Familiarity with HDL verification methods and high-speed interfaces.

Responsibilities

• Design and develop RTL for DRAM memory controllers and subsystem components using SystemVerilog.
• Collaborate with analog, verification, physical design, validation, and other cross-functional teams to support successful product development.
• Develop and validate HDL models, support simulation and co-simulation activities, and analyze design functionality and performance.
• Support chip bring-up, debugging, and validation activities to identify and resolve design issues.
• Use scripting, automation, and AI-enabled tools to improve design workflows, productivity, and engineering efficiency.

Skills

RTL design

SystemVerilog

Python / scripting

Verification

AI tools familiarity

Education

Bachelor's or Master's degree in Electrical or Computer Engineering

Tools

Synthesis tools

Linting tools

Equivalency checking

Formal verification

Simulation

Job description

Micron Technology in Minneapolis is seeking an ASIC Digital Design Engineer to contribute to RTL design for DRAM memory controllers and subsystems. You will work across design implementation, simulation, validation, and chip bring-up, leveraging AI-enabled tools to improve productivity.

The role requires 0-2 years experience in digital design or ASIC development, a degree in Electrical or Computer Engineering, and knowledge of SystemVerilog, verification methods, and high-speed interfaces.