Senior ASIC Physical Design Engineer Tape-Out (Onsite)

8413 LSI Corporation; San Jose (CA); On-site; USD 144,000 - 230,000; Full time

Job summary

Broadcom, Inc. is seeking a Physical Design Engineer to join the ASIC Products Division in San Jose.

This role involves working with the latest technology to advance next generation AI designs and requires in-depth knowledge of physical design from RTL to silicon tape-out. Responsibilities include execution of physical design, physical verification, and timing closure; experience with top-level STA EM/IR analysis, place-and-route, clock tree synthesis, floorplanning, and collaboration with RTL

Qualifications

• Bachelor’s degree in Electrical Engineering or Electronics Engineering; 12+ years of relevant experience.
• Proficiency in TCL/Perl scripting.
• Full physical design cycle experience: RTL to Tape-out.
• Excellent verbal and written communication skills.

Responsibilities

• Execution of Physical Design, Physical Verification, and Timing Closure.
• Timing closure through various methods and strategies; top-level STA EM/IR analysis; Place and Route Clock Tree Synthesis.
• Floor-planning and Layout; top-level floorplanning flow and methodology.
• Collaborating with IC Design RTL Engineers.

Skills

TCL/Perl scripting

EDA tools proficiency

RTL to Tape-out

Communication skills

Education

Bachelor's degree in Electrical or Electronics Engineering

Job description

Broadcom, Inc. is seeking a Physical Design Engineer to join the ASIC Products Division in San Jose.

This role involves working with the latest technology to advance next generation AI designs and requires in-depth knowledge of physical design from RTL to silicon tape-out. Responsibilities include execution of physical design, physical verification, and timing closure; experience with top-level STA EM/IR analysis, place-and-route, clock tree synthesis, floorplanning, and collaboration with RTL