Senior ASIC Physical Design Engineer

Thundersoft; Santa Clara (CA); On-site; USD 120,000 - 190,000; Full time

Job summary

Thundersoft is seeking highly motivated Physical Design Engineers across multiple career levels to join our ASIC implementation team in Santa Clara, CA. You will contribute to the development and execution of advanced physical design methodologies for complex SoCs and IP blocks, working with architecture, RTL, DFT, verification, CAD, and product engineering teams.

The role involves floorplanning, power planning, place-and-route, clock tree synthesis, timing closure, SI analysis, physical

Qualifications

• Bachelor's degree with 4+ years ASIC design/verification/validation experience
• Master's degree with 3+ years ASIC design/verification/validation experience
• PhD with 2+ years ASIC design/verification/validation experience
• Experience with digital ASIC physical implementation methodologies
• Understanding of power, performance, area, timing, and physical design tradeoffs
• Experience in Linux/Unix environments
• Proficient in Python, Tcl, Perl, Shell or similar scripting languages
• Strong analytical, problem-solving, and debugging skills
• Successful project execution

Responsibilities

• Floorplanning, power planning, place and route, CTS, routing, timing closure, SI analysis, physical verification, ECO implementation and signoff
• Collaborate with architecture, RTL, DFT, verification, CAD and product engineering teams through tapeout
• Use Cadence Innovus and Synopsys Fusion Compiler for physical design and optimization
• Support advanced SoC programs including GPU, AI, Compute, Connectivity, DDR, Audio and other next-gen technologies
• Ensure timing closure and design signoff across multi-project environments

Skills

ASIC design

Digital ASIC

PPA tradeoffs

Linux/Unix

Python

Tcl

Shell scripting

Problem solving

Debugging

Education

Bachelor's degree in Science/Engineering

Master's degree in Science/Engineering

PhD in Science/Engineering

Tools

Cadence Innovus

Synopsys Fusion Compiler

Synopsys PrimeTime

Job description

Thundersoft is seeking highly motivated Physical Design Engineers across multiple career levels to join our ASIC implementation team in Santa Clara, CA. You will contribute to the development and execution of advanced physical design methodologies for complex SoCs and IP blocks, working with architecture, RTL, DFT, verification, CAD, and product engineering teams.

The role involves floorplanning, power planning, place-and-route, clock tree synthesis, timing closure, SI analysis, physical