Senior ASIC Package Design Engineer - High-Speed SerDes

Broadcom

San Jose (CA)

On-site

USD 144,000 - 230,000

Full time

3 days ago
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Benefits offered by this job

Discretionary annual bonus
Equity grants
401(k) with company matching
Medical/dental/vision benefits
Paid holidays

Job summary

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for ASICs with high-speed SerDes and high-power delivery needs. You will join a world-wide R&D team developing high-performance package designs for AI, networking, HPC, and 5G base stations.

Responsibilities include design, SI/PI, scheduling across multiple projects, and collaboration with internal and external teams. On-site role with a competitive compensation package and bonus/equity opportunities.

Qualifications

  • Requires BSEE or similar field with 12+ years in flip-chip-BGA package design, including high-speed SerDes.
  • Experience with package-level SI/PI and reliable, manufacturable designs.
  • Cadence APD (Allegro) or equivalent tool experience; design automation coding is a plus.

Responsibilities

  • Overall design responsibility for ASIC package designs including SI/PI, manufacturability, reliability and thermal.
  • Package design of SerDes, ADC/DAC, DDR, HBM, etc.
  • Manage 2+ projects simultaneously and track progress.
  • Perform general flip-chip BGA package design and engineering.
  • Project management and customer interface for design projects.
  • Improve design team efficiency through process development and automation.

Skills

Self-management
Time-zone collaboration
Project management
Design automation

Education

BSEE or similar field
MSEE or similar field

Tools

Cadence APD Allegro
Cadence SKILL

Job description

Broadcom is seeking an experienced IC package-design engineer for complex flip-chip-BGA packages for ASICs with high-speed SerDes and high-power delivery needs. You will join a world-wide R&D team developing high-performance package designs for AI, networking, HPC, and 5G base stations.

Responsibilities include design, SI/PI, scheduling across multiple projects, and collaboration with internal and external teams. On-site role with a competitive compensation package and bonus/equity opportunities.

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