Senior ASIC Verification Engineer for Space & Satellite

Anysilicon; Irvine, Northern (CA, KY); Hybrid; USD 140,000 - 200,000; Full time

Job summary

SpaceX is seeking a Sr. ASIC Design Verification Engineer for its Starshield team, focusing on advanced FPGA/ASIC verification for space and ground infrastructure.

You will lead verification at block and system levels and develop test harnesses and UVM-based testbenches. The role requires 5+ years in design verification, strong SystemVerilog and Python skills, and experience with constrained random verification.

Qualifications

• Bachelor's degree in electrical/computer engineering or computer science.
• 5+ years of design verification and test bench development experience.

Responsibilities

• Conduct digital ASIC verification at block and system levels.
• Lead verification test plans and milestones.
• Develop test harnesses and sequences for testing designs.
• Create SystemVerilog testbench infrastructure (UVM and non-UVM).
• Execute test plans, run regressions, and ensure code and functional coverage closure.
• Automate test case generation using Python and MATLAB.
• Contribute to pre-silicon verification, chip bring-up, and post-silicon validation.

Skills

UVM/OVM/VMM

SystemVerilog

Python scripting

MATLAB

Constrained random

RTL verification

Education

Bachelor's degree in electrical/computer engineering or computer science

Job description

SpaceX is seeking a Sr. ASIC Design Verification Engineer for its Starshield team, focusing on advanced FPGA/ASIC verification for space and ground infrastructure.

You will lead verification at block and system levels and develop test harnesses and UVM-based testbenches. The role requires 5+ years in design verification, strong SystemVerilog and Python skills, and experience with constrained random verification.