Senior ASIC DFT & Debug Engineer

ALTEN; San Diego (CA); On-site; USD 100,000 - 130,000; Full time

Job summary

ALTEN is looking for an experienced candidate to join their Digital ASIC Design Team in San Diego, California. The role involves implementing and verifying DFT/DFD techniques to ensure successful chip design. A minimum of five years of experience in ASIC/DFT is required, along with a solid background in scan insertion and ATPG. Successful candidates will work within a dynamic international team, deliver solutions for complex chips, and communicate effectively. This position emphasizes both technical proficiency and collaborative skills.

Qualifications

• Minimum of 5-6 years experience in the area of ASIC/DFT.
• In depth knowledge of DFT concepts.
• Expertise in scripting languages such as Perl, shell, etc.

Responsibilities

• Contributing to DFT insertion and validation effort of complex chip.
• Analyze and propose best compression for given SoC/core/block.
• Debug/resolve DRC issues and ensure fixes with the front-end team.

Skills

DFT concepts

ASIC design

Scan insertion

ATPG

Coverage analysis

Perl scripting

Shell scripting

Problem solving

Teamwork

Adaptability to new tools

Education

Bachelor's or Master's in Engineering

Tools

Synopsis TetraMax

Cadence Encounter Test

RTL lint tool (like SpyGlass)

Job description

ALTEN is looking for an experienced candidate to join their Digital ASIC Design Team in San Diego, California. The role involves implementing and verifying DFT/DFD techniques to ensure successful chip design. A minimum of five years of experience in ASIC/DFT is required, along with a solid background in scan insertion and ATPG. Successful candidates will work within a dynamic international team, deliver solutions for complex chips, and communicate effectively. This position emphasizes both technical proficiency and collaborative skills.