Senior AI Hardware RTL/ASIC Engineer

SambaNova

Austin (TX)

On-site

USD 120,000 - 200,000

Full time

4 days ago
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Job summary

SambaNova Systems is seeking a Senior Hardware Design Engineer to own blocks within the RDU ASIC. You will write and debug SystemVerilog RTL, contribute to microarchitecture specifications, and shepherd blocks through implementation, tapeout, and silicon bring-up.

You will collaborate with principal engineers, architects, design verification, and physical design teams to meet PPA targets while advancing AI workload acceleration in our enterprise systems.

Qualifications

  • Master's or Bachelor's degree with relevant engineering experience.
  • Strong SystemVerilog RTL design skills for high-speed ASICs.
  • Solid foundation in computer architecture and digital logic.
  • Experience trading off PPA, and with interconnects like AXI, PCIe, Ethernet, HBM/DDR.
  • Proficiency with linting, CDC, LEC, and STA toolchains.
  • Scripting abilities in Python and Linux shell; Git for version control.

Responsibilities

  • Write, debug, and verify SystemVerilog RTL for assigned blocks in the RDU ASIC.
  • Contribute sections of the microarchitecture spec and carry blocks through implementation and tapeout.
  • Meet Power, Performance, and Area targets using advanced digital design techniques.
  • Collaborate with verification and physical design teams to converge on functionality and timing.
  • Implement SVA, run lint, CDC, and LEC to ensure design correctness.
  • Support post-silicon bring-up and participate in design flow improvements with AI/EDA tooling.

Skills

Computer architecture
Digital logic design
SystemVerilog RTL design
PPA tradeoffs
Interconnect protocols (AXI, PCIe, Eth
HBM/DDR
Python & Linux shell scripting
Git version control
RTL debugging & linting

Education

Master's degree in Computer Engineering or Electrical Engineering
Bachelor's degree with 5–7 years of experience

Tools

Synthesis tools
Static Timing Analysis (STA)
Linting/CDC/LEC tool suites
Hardware performance tuning tools
Git
Python
Linux shell

Job description

SambaNova Systems is seeking a Senior Hardware Design Engineer to own blocks within the RDU ASIC. You will write and debug SystemVerilog RTL, contribute to microarchitecture specifications, and shepherd blocks through implementation, tapeout, and silicon bring-up.

You will collaborate with principal engineers, architects, design verification, and physical design teams to meet PPA targets while advancing AI workload acceleration in our enterprise systems.

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