Senior AI ASIC Hardware Design Engineer

SambaNova; San Jose (CA); On-site; USD 120,000 - 200,000; Full time

Benefits offered by this job

Health insurance

Dental and Vision

HSA

Flexible Spending

Job summary

SambaNova Senior Hardware Design Engineer is sought to design components of the Reconfigurable Dataflow Unit (RDU) ASICs. You will work with principal engineers and archi‑tects to implement features in hardware for AI workloads, writing and debugging RTL and taking ownership through tapeout and silicon bring‑up.

The role focuses on sub‑blocks within a larger subsystem, growing scope as you deepen architectural knowledge. This onsite role supports San Jose, CA or Austin, TX based teams.

Qualifications

• Master's degree in Computer Engineering or Electrical Engineering; 3–5 years experience, or Bachelor's with 5–7 years.
• Solid foundation in computer architecture and digital logic design.
• Strong SystemVerilog RTL design skills for high-speed ASICs.
• Experience trading off Power, Performance, and Area (PPA).
• Knowledge of AXI, PCIe, Ethernet, and HBM/DDR interconnects.
• Experience with linting, CDC, and LEC tools; SVA usage.
• Proficiency with Git, Python, and Linux shell.
• Willingness to work onsite in San Jose, CA or Austin, TX.

Responsibilities

• Author sections of the microarchitecture specification for compute, memory, or networking subsystems.
• Code, integrate, and debug SystemVerilog RTL for assigned blocks through design and production lifecycle.
• Meet PPA targets for blocks using advanced digital design techniques.
• Collaborate with verification and physical design engineers to converge on functionality, timing, and area.
• Implement SVA to check design intent and run lint, CDC, and LEC flows.
• Support post-silicon bring-up and debug for owned blocks.
• Contribute to design flow improvements, including AI/EDA tool methodologies.

Skills

SystemVerilog RTL design

Digital logic design

Computer architecture

PPA trade-offs

Python

Linux shell

Git

SVA (SystemVerilog Assertions)

Interconnects and protocols

Education

Master's degree in Computer/Electrical Engineering

Bachelor's degree

Tools

linting tools

CDC/LEC tools

STA tools

EDA simulators

Git tooling

Job description

SambaNova Senior Hardware Design Engineer is sought to design components of the Reconfigurable Dataflow Unit (RDU) ASICs. You will work with principal engineers and archi‑tects to implement features in hardware for AI workloads, writing and debugging RTL and taking ownership through tapeout and silicon bring‑up.

The role focuses on sub‑blocks within a larger subsystem, growing scope as you deepen architectural knowledge. This onsite role supports San Jose, CA or Austin, TX based teams.