Senior AI Hardware Design Engineer (ASIC & RDU)

SambaNova; Austin (TX); On-site; USD 120,000 - 200,000; Full time

Benefits offered by this job

Equity

Health insurance

Wellness programs

Job summary

SambaNova Senior Hardware Design Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs deployed in our AI workload acceleration systems. You will work alongside principal engineers, architects, design verification engineers, and physical design engineers to implement innovative features in hardware that provide unique value to SambaNova.

In this role you will take ownership of blocks within a larger subsystem - contributing sections of the microarchitecture

Qualifications

• Master's degree in Computer Engineering or Electrical Engineering, with 3–5 years of relevant experience.
• Solid foundation in computer architecture and digital logic design.
• Strong SystemVerilog RTL design skills for high-speed ASICs.
• Experience making PPA trade-offs (Power, Performance, Area).
• Familiarity with AXI, PCIe, Ethernet, HBM/DDR interconnects.
• Proficiency with tooling for linting, STA, SVA, CDC, and LEC.
• Experience with Git for release management; Python and Linux shell scripting.
• Ability to work onsite in San Jose, CA or Austin, TX.

Responsibilities

• Author sections of the microarchitecture specification for compute, memory, or networking subsystems.
• Code, integrate, and debug SystemVerilog RTL for assigned blocks through the chip implementation and production lifecycle.
• Meet Power, Performance, and Area (PPA) targets for your blocks using advanced digital design techniques for high-speed design.
• Partner with design verification and physical design engineers to converge on functionality, timing, and area.
• Implement SystemVerilog Assertions (SVA) and run lint, CDC, and LEC flows to check design intent and keep blocks clean.
• Participate in design reviews, presenting your design decisions and incorporating feedback.
• Support post-silicon bring-up and debug for the blocks you own.
• Contribute to design flow improvements, including AI and automation in EDA tool methodologies.

Skills

SystemVerilog RTL

Python

Linux shell

Git

SVA

PPA trade-offs

AXI/PCIe/Ethernet

HDL debugging

Education

Master's degree in Computer Engineering or Electrical Engineering

Bachelor's degree with 5–7 years

Tools

Synthesis tools

STA

Linting tools

CDC

LEC

Job description

SambaNova Senior Hardware Design Engineers design component units of the Reconfigurable Dataflow Unit (RDU) ASICs deployed in our AI workload acceleration systems. You will work alongside principal engineers, architects, design verification engineers, and physical design engineers to implement innovative features in hardware that provide unique value to SambaNova.

In this role you will take ownership of blocks within a larger subsystem - contributing sections of the microarchitecture