RTL Design Engineer – Lead Custom Silicon & IP

Google LLC; Mountain View (CA); Sur place; USD 138 000 - 197 000; Plein temps

Avantages offerts par ce poste

Equity

Benefits package

Résumé du poste

Google LLC in Mountain View, CA is seeking a hardware-focused IC engineer to define microarchitecture and integrate IP for custom silicon powering its consumer products.

You will perform RTL coding and verification with Verilog/VHDL and collaborate across hardware, software, and AI teams to deliver high-performance, energy-efficient subsystems. The role supports comprehensive benefits and equity opportunities.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 4 years of experience with IP development or integration.
• Experience in ASIC development with Verilog or VHDL.
• Experience with a scripting language like Perl or Python.

Responsabilités

• Define microarchitecture for a subsystem.
• Integrate internal or external IP.
• Define microarchitecture of a small to medium size IP.
• Perform RTL coding, function/performance simulation, debug and Lint/CDC/FV/UPF checks.
• Participate in test plan and coverage analysis of the sub-system and chip-level verification.

Connaissances

IP development

Verilog

VHDL

Perl

Python

Formation

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Master's or PhD preferred (Electrical Engineering, Computer Engineering or Computer Science)

Outils

FPGA platforms

Emulation platforms

Description du poste

Google LLC in Mountain View, CA is seeking a hardware-focused IC engineer to define microarchitecture and integrate IP for custom silicon powering its consumer products.

You will perform RTL coding and verification with Verilog/VHDL and collaborate across hardware, software, and AI teams to deliver high-performance, energy-efficient subsystems. The role supports comprehensive benefits and equity opportunities.