RISC-V AI-Enabled CPU Microarchitecture & RTL Design Engineer

Mirafra Technologies; United States; On-site; USD 120,000 - 180,000; Full time

Job summary

Mirafra Technologies is seeking engineers to define microarchitecture specifications for RISC-V units and to own RTL design and verification quality. The role includes crafting verification strategies, applying RTL optimizations for PPA closure, and leveraging AI tools to accelerate CPU design.

Mentoring junior engineers may be part of the responsibilities. The position emphasizes hands-on specification and RTL work to deliver high-quality CPU units with strong verification and performance

Qualifications

• Define and develop microarchitecture specifications for the assigned unit.
• RTL design and verification capability.
• Experience with PPA closure strategies.
• Ability to mentor junior engineers.

Responsibilities

• Define and develop microarchitecture specifications for the assigned unit (branch predictor, rename, instruction scheduling, vector execution, load/store).
• Develop RTL and review/refine unit verification environments to improve RTL quality and PPA.
• Apply RTL optimization to control PPA and improve design efficiency.
• Mentor junior engineers and contribute to AI-assisted design adaptation to accelerate CPU design.

Job description

Mirafra Technologies is seeking engineers to define microarchitecture specifications for RISC-V units and to own RTL design and verification quality. The role includes crafting verification strategies, applying RTL optimizations for PPA closure, and leveraging AI tools to accelerate CPU design.

Mentoring junior engineers may be part of the responsibilities. The position emphasizes hands-on specification and RTL work to deliver high-quality CPU units with strong verification and performance