Application Specific Integrated Circuit Design Engineer

Mirafra Technologies

United States

On-site

USD 120,000 - 180,000

Full time

14 days+
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Job summary

Mirafra Technologies is seeking engineers to define microarchitecture specifications for RISC-V units and to own RTL design and verification quality. The role includes crafting verification strategies, applying RTL optimizations for PPA closure, and leveraging AI tools to accelerate CPU design.

Mentoring junior engineers may be part of the responsibilities. The position emphasizes hands-on specification and RTL work to deliver high-quality CPU units with strong verification and performance

Qualifications

  • Define and develop microarchitecture specifications for the assigned unit.
  • RTL design and verification capability.
  • Experience with PPA closure strategies.
  • Ability to mentor junior engineers.

Responsibilities

  • Define and develop microarchitecture specifications for the assigned unit (branch predictor, rename, instruction scheduling, vector execution, load/store).
  • Develop RTL and review/refine unit verification environments to improve RTL quality and PPA.
  • Apply RTL optimization to control PPA and improve design efficiency.
  • Mentor junior engineers and contribute to AI-assisted design adaptation to accelerate CPU design.

Job description

RISC-V CPU Unit Microarchitecture Specification: Define and develop microarchitecture specifications for the assigned unit (branch predictor, rename, instruction scheduling, vector execution, load/store, vector load/store support). The specification includes not only design, but also comprehensive analysis / strategy for verification and PPA (power, performance, area) closure.

RISC-V CPU Core Unit RTL Design: The candidate will be responsible for the quality of RTL including design verification and PPA closure. This includes writing RTL, reviewing / refining unit verification environment, applying right RTL optimization to control PPA.

AI Assisted Design Adaption: To maximize the team’s output, the candidate actively uses AI tools to accelerate the CPU design process.

Mentoring Junior Engineers: depending on a seniority of the engineer, the engineer may mentor junior members in the team.

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