Remote DFT Engineer: High-Speed CPU & SIP Testability

Tenstorrent; United States; Remote; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent, a leader in AI silicon, seeks a DFT engineer to drive chip-level DFT strategies for high-speed CPU cores and multi-chiplet SIPs. This remote role is based in the United States, requiring 10+ years in DFT and hands-on use of Synopsys/Siemens tools, TCL and Python scripting.

You will collaborate with RTL, physical design, and verification teams to implement scan chains, memory BIST, and JTAG, ensuring testability across the design flow and automating DFT workflows.

Qualifications

• 10+ years of relevant DFT experience.
• Hands-on experience with industry-standard DFT tools (Synopsys, Siemens).
• Expertise in DFT planning, SoC silicon debug, formal verification, and signoff of DFT logic.
• Strong cross-functional collaboration and risk assessment.

Responsibilities

• Build and execute chip-level DFT strategies for high-speed CPU cores and multi-chiplet SIPs.
• Implement and verify DFT features including scan chains, memory BIST, and JTAG.
• Partner with RTL, physical design, and verification teams to ensure testability.
• Script, automate, and analyze DFT flows using industry-standard EDA tools (ATPG, fault coverage).

Skills

DFT

Synopsys

Siemens

TCL scripting

Python scripting

Education

Bachelor's in EE/CE/CS

Master's degree

PhD

Tools

Synopsys

Siemens

TCL

Python

Job description

Tenstorrent, a leader in AI silicon, seeks a DFT engineer to drive chip-level DFT strategies for high-speed CPU cores and multi-chiplet SIPs. This remote role is based in the United States, requiring 10+ years in DFT and hands-on use of Synopsys/Siemens tools, TCL and Python scripting.

You will collaborate with RTL, physical design, and verification teams to implement scan chains, memory BIST, and JTAG, ensuring testability across the design flow and automating DFT workflows.