DFT Engineer

Tenstorrent; United States; Remote; USD 100,000 - 500,000; Full time

Job summary

Tenstorrent, a leader in AI silicon, seeks a DFT engineer to drive chip-level DFT strategies for high-speed CPU cores and multi-chiplet SIPs. This remote role is based in the United States, requiring 10+ years in DFT and hands-on use of Synopsys/Siemens tools, TCL and Python scripting.

You will collaborate with RTL, physical design, and verification teams to implement scan chains, memory BIST, and JTAG, ensuring testability across the design flow and automating DFT workflows.

Qualifications

• 10+ years of relevant DFT experience.
• Hands-on experience with industry-standard DFT tools (Synopsys, Siemens).
• Expertise in DFT planning, SoC silicon debug, formal verification, and signoff of DFT logic.
• Strong cross-functional collaboration and risk assessment.

Responsibilities

• Build and execute chip-level DFT strategies for high-speed CPU cores and multi-chiplet SIPs.
• Implement and verify DFT features including scan chains, memory BIST, and JTAG.
• Partner with RTL, physical design, and verification teams to ensure testability.
• Script, automate, and analyze DFT flows using industry-standard EDA tools (ATPG, fault coverage).

Skills

DFT

Synopsys

Siemens

TCL scripting

Python scripting

Education

Bachelor's in EE/CE/CS

Master's degree

PhD

Tools

Synopsys

Siemens

TCL

Python

Job description

Tenstorrent is leading the industry on cutting-edge AI technology, revolutionizing performance expectations, ease of use, and cost efficiency. With AI redefining the computing paradigm, solutions must evolve to unify innovations in software models, compilers, platforms, networking, and semiconductors. Our diverse team of technologists have developed a high performance RISC-V CPU from scratch, and share a passion for AI and a deep desire to build the best AI platform possible. We value collaboration, curiosity, and a commitment to solving hard problems. We are growing our team and looking for contributors of all seniorities.

Tenstorrent is looking for a person ready to take up the challenge of working in a high-profile project where we design and integrate multiple chiplets into a System-in-package, in collaboration with external stakeholders. You will work with Tenstorrent worldwide experts and leaders in the USA, Japan and other countries, and help us make our IP even better. In this role, you will be responsible for DFT implementation using industry standard tools for high-speed CPU core design.

This role is remote based out of the United States.

We welcome candidates at various experience levels for this role. During the interview process, candidates will be assessed for the appropriate level, and offers will align with that level, which may differ from the one in this posting.

Who you are

• You have a Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, or Computer Science, along with 10+ years of relevant DFT experience.
• You have hands-on experience with industry-standard DFT tools such as Synopsys and Siemens, as well as scripting in TCL and Python.
• You bring expertise in DFT planning, SoC-level silicon debug, formal verification, and signoff of inserted DFT logic.
• You are a strong cross-functional collaborator who can assess risk, communicate resource needs, and deliver in a complex technical environment.

What we need

• Build and execute chip-level DFT strategies for high-speed CPU core designs and multi-chiplet System-in-Package programs.
• Implement and verify DFT features including scan chains, memory BIST, and JTAG to support manufacturing test and silicon debug.
• Partner with RTL, physical design, and verification teams to ensure testability throughout the design flow.
• Script, automate, and analyze DFT flows using industry-standard EDA tools, including ATPG and fault coverage reporting.

What you will learn

• How to develop DFT strategies for advanced multi-chiplet and System-in-Package designs.
• How Tenstorrent approaches testability, silicon bring-up, and manufacturing readiness for high-performance CPU programs.
• How to work across global teams and external stakeholders on complex silicon development efforts.
• How to scale DFT execution through automation, deeper cross-functional collaboration, and continuous IP improvement.

Compensation for all engineers at Tenstorrent ranges from $100k - $500k including base and variable compensation targets. Experience, skills, education, background and location all impact the actual offer made.

Tenstorrent offers a highly competitive compensation package and benefits, and we are an equal opportunity employer.

This offer of employment is contingent upon the applicant being eligible to access U.S. export-controlled technology. Due to U.S. export laws, including those codified in the U.S. Export Administration Regulations (EAR), the Company is required to ensure compliance with these laws when transferring technology to nationals of certain countries (such as EAR Country Groups D:1, E1, and E2). These requirements apply to persons located in the U.S. and all countries outside the U.S. As the position offered will have direct and/or indirect access to information, systems, or technologies subject to these laws, the offer may be contingent upon your citizenship/permanent residency status or ability to obtain prior license approval from the U.S. Commerce Department or applicable federal agency. If employment is not possible due to U.S. export laws, any offer of employment will be rescinded.