Principal Digital Verification & Emulation Engineer

Ayar Labs; San Jose (CA); On-site; USD 190,000 - 250,000; Full time

Job summary

Ayar Labs in San Jose, CA is seeking a Principal Engineer, Digital Verification and Emulation to spearhead verification efforts for our silicon photonic chips. The ideal candidate has over 12 years of experience in ASIC/SoC verification and expertise with hardware emulation platforms.

This role involves collaborating closely with various teams while leading the verification methodology and ensuring readiness for simulation and tape-out. A competitive salary of $190,000 - $250,000 is offered for this on-site role.

Qualifications

• 12+ years of relevant ASIC/SoC verification experience.
• 6+ years of experience with hardware emulation platforms.
• Strong knowledge of SystemVerilog and debugging complex designs.

Responsibilities

• Lead hardware-assisted verification using emulation platforms.
• Own emulator bring-up and model mapping.
• Develop and validate real-number models for interfaces.

Skills

Digital Verification

Hardware Emulation

Python

SystemVerilog

Debugging

Education

BS in Electrical Engineering, Computer Engineering, or related field

Tools

Synopsys ZeBu

Cadence Palladium

Siemens Veloce

Job description

Ayar Labs in San Jose, CA is seeking a Principal Engineer, Digital Verification and Emulation to spearhead verification efforts for our silicon photonic chips. The ideal candidate has over 12 years of experience in ASIC/SoC verification and expertise with hardware emulation platforms.

This role involves collaborating closely with various teams while leading the verification methodology and ensuring readiness for simulation and tape-out. A competitive salary of $190,000 - $250,000 is offered for this on-site role.