Emulation Lead/Principal Engineer

TylSemi, Inc.; San Jose (CA); On-site; USD 238,000 - 286,000; Full time

Job summary

TylSemi, Inc. in San Jose, CA is seeking an Emulation Lead/Principal Engineer to build scalable pre-silicon environments.

You will enable firmware, software and system validation months before first silicon arrives, boot real software, run workloads and expose bottlenecks to accelerate product readiness. You will architect multi-die emulation platforms using Palladium, ZeBu and Veloce, drive pre-silicon bring-up, and lead cross-functional verification and debugging efforts across RTL, firmware

Qualifications

• 10+ years of ASIC/SoC development with emulation ownership.
• Experience with Palladium, ZeBu or Veloce emulation platforms.
• Strong RTL skills in Verilog/SystemVerilog.
• Firmware bring-up, embedded processors, interrupts and system debug.
• Proficiency in C/C++ and Python.
• Excellent cross-functional debugging and technical leadership.
• Proven track record leading complex verification and emulation programs.

Responsibilities

• Architect and deploy full-chip, multi-die and subsystem emulation environments using Palladium, ZeBu, Veloce or similar platforms.
• Enable pre-silicon bring-up of boot ROM, firmware, drivers, operating systems and workloads.
• Develop scalable emulation methodologies and reusable infrastructure; drive system validation, performance analysis and root-cause debug.
• Build automation, CI/CD workflows, regressions and release processes that scale across engineering teams.
• Partner with architecture, design, verification, firmware, DFT and post-silicon teams to reduce product risk before tapeout.
• Influence methodology, observability, debugability and overall silicon readiness.
• Lead complex debug spanning RTL, firmware, software and hardware platforms.
• Mentor engineers and influence architecture to improve observability and product quality.

Skills

Verilog/SystemVerilog

C/C++

Python

Firmware bring-up

Debugging

Technical leadership

Tools

Palladium

ZeBu

Veloce

Job description

Emulation Lead/Principal Engineer

TylSemi, Inc. San Jose, California, United States

About this position

About TYLsemi, Inc.

The Opportunity

About TYLsemi, Inc.

The Opportunity

The AI infrastructure market is exploding. Every hyperscaler, every cloud provider, every AI company is building custom silicon. But they all face the same problem: how do you connect hundreds of chips, deliver clean power at scale, and move terabits of data without melting the package?

That's what we solve. TYLsemi builds the chiplet infrastructure IP — the IO, power delivery, and interconnect building blocks — that makes AI/HPC systems actually work at scale.

This isn't a nice-to-have. It's the critical path.

Why Now

The Market Window

The semiconductor industry is going through its biggest architectural shift in 40 years:

Moore's Law is dead. 2nm and beyond delivers marginal performance gains. The future is chiplets, not monolithic dies.

Custom silicon is now mainstream. Google, Microsoft, Amazon, Meta, OpenAI — they're all designing their own ASICs. The $50B custom silicon market is growing 30% annually.

IO and power are the bottleneck. Solve hard problems and provide something which is a category in itself.

Translation: We're entering the market at exactly the moment when every major AI/HPC player needs what we're building, and their alternatives are disappearing.

Culture & Team: How We Work

No Politics, No Bureaucracy

There are no layers, no approval chains, no corporate theater.

If you have an idea, we test it. If it works, we ship it.

No endless meetings, no PowerPoint presentations to convince middle management.

Remote-Friendly, Global Team

US team: Bay Area preferred, but we hire the best people regardless of location

India team: Building a world-class design center in Bangalore

Move Fast, Ship Real Products

We're not a research project. We have paying customers, committed capital, and aggressive timelines.

This is a company, not a lifestyle business. We're building to win.

What We Value

Ownership mindset. You're not here to execute someone else's roadmap. You're here to define it.

Bias for action. We move fast. Analysis paralysis doesn't fly here.

Deep technical expertise. This is hard engineering. We need people who've shipped real silicon and debugged real hardware.

Low ego, high standards. We don't care about titles or politics. We care about results.

About the role

Build the platform that brings silicon to life before tapeout.

TYLsemi is developing a purpose-built connectivity chiplet for HPC / rack-scale AI systems. We are seeking a Principal Engineer Emulation Lead to create scalable pre-silicon environments that enable firmware, software, and system validation months before first silicon arrives. You'll build production-grade platforms that boot real software, run meaningful workloads, expose system bottlenecks, and accelerate product readiness across the organization.

What You'll Do

Architect and deploy full-chip, multi-die, and subsystem emulation environments using Palladium, ZeBu, Veloce, or similar platforms.

Enable pre-silicon bring-up of boot ROM, firmware, drivers, operating systems, and application workloads.

Develop scalable emulation methodologies and reusable infrastructure, Drive system-level validation, performance analysis, and root-cause debug across RTL, firmware, software, and verification.

Build automation, CI/CD workflows, regressions, and release processes that scale across engineering teams.

Partner with architecture, design, verification, firmware, DFT, and post-silicon teams to reduce product risk before tapeout.

Influence methodology, observability, debugability, and overall silicon readiness.

Lead complex debug spanning RTL, firmware, software, and hardware platforms.

Mentor engineers and influence architecture to improve observability, diagnosability, and product quality.

What We’re Looking For

10+ years of ASIC/SoC development experience with significant emulation ownership.

Expertise with commercial emulation platforms (Palladium, ZeBu, or Veloce).

Strong RTL skills in Verilog/SystemVerilog.

Experience with firmware bring-up, embedded processors, interrupts, and system debug.

Proficiency in C/C++ and scripting with Python.

Excellent cross-functional debugging and technical leadership skills.

Proven track record leading complex verification and emulation programs.

Nice to Have

Ethernet, PCIe, CXL or high-speed interconnects.

FPGA prototyping (Protium, HAPS, etc.).

Security architectures, Root of Trust, and secure boot.

First-silicon bring-up and system qualification experience.

Why Join Us?

You’ll work at the intersection of silicon, software, and systems, helping bring cutting-edge AI and data-center products to life while influencing architecture and product quality from day one.

If you're passionate about hardware/software co-validation, large-scale emulation, and building world-class silicon platforms, we'd love to hear from you.

The pay range for this role is: 237,500 - 286,000 USD per year (US)