Principal ASIC Design Engineer - AI Hardware

Upscale, Inc.

United States

On-site

USD 250,000 - 265,000

Full time

14 days+

Get a reply from this employer

Your resume and cover letter, tailored to exactly what they’re hiring for.

Get past ATS filters

Job summary

Upscale, Inc. is building high-performance infrastructure for AI workloads. We seek an experienced ASIC design engineer to define micro-architecture for next-gen designs, and to drive power, performance, and area targets.

You will own RTL entry and collaborate across verification, layout, and DFT teams to ensure robust designs. The role demands SystemVerilog expertise, strong fundamentals in logic design, and proven ability to deliver in a fast-paced startup environment.

Qualifications

  • BE or MS in EE, CE, or CS required.
  • 5+ years of related engineering experience.
  • 5+ years of experience in logic design on complex ASICs.
  • Experience with SystemVerilog for logic design.
  • Understanding of logic design fundamentals, clock domain crossing, synthesis and timing closure.
  • Strong communication and teamwork in fast-paced startup environments.

Responsibilities

  • Define and document micro-architecture on next generation designs as part of ASIC Design.
  • Own logic design and RTL entry meeting power, performance, and area targets.
  • Collaborate with verification and emulation to ensure test plans align with architecture and design intent.
  • Coordinate with physical design for timing closure and area optimization.
  • Work with DFT integration with test teams and drive design fixes.
  • Operate independently and communicate effectively with cross-functional teams.

Skills

SystemVerilog
Logic design
RTL design
Timing closure
Collaboration

Education

BE or MS in EE, CE, CS

Job description

Upscale, Inc. is building high-performance infrastructure for AI workloads. We seek an experienced ASIC design engineer to define micro-architecture for next-gen designs, and to drive power, performance, and area targets.

You will own RTL entry and collaborate across verification, layout, and DFT teams to ensure robust designs. The role demands SystemVerilog expertise, strong fundamentals in logic design, and proven ability to deliver in a fast-paced startup environment.

Get your free, confidential resume review.

or drag and drop your file here.

Similar jobs

Similar jobs worth comparing

ASIC Design - Principal Engineer
ASIC Design - Principal Engineer

Upscale AI, Inc. • United States

On-site
USD 150,000 - 190,000
ASIC Design - Principal Engineer
ASIC Design - Principal Engineer

Upscale, Inc. • United States

On-site
USD 250,000 - 265,000
Senior ASIC Modeling Engineer for AI Networking
Senior ASIC Modeling Engineer for AI Networking

Upscale, Inc. • United States

On-site
USD 159,000 - 178,000
Senior ASIC Modeling Software Engineer
Senior ASIC Modeling Software Engineer

Upscale AI • United States

On-site
USD 120,000 - 180,000
Senior ASIC Design Lead for AI Inference Chips
Senior ASIC Design Lead for AI Inference Chips

Positron Corporation • United States

Remote
USD 225,000 - 350,000
Lead ASIC Design Engineer
Lead ASIC Design Engineer

Oho Group • San Jose (CA)

On-site
USD 180,000 - 260,000
Senior ASIC Design Architect for AI Inference SoCs
Senior ASIC Design Architect for AI Inference SoCs

Positron Corporation • Austin (TX)

On-site
USD 225,000 - 350,000
Equity
Flexible work environment
Comprehensive benefits
Senior ASIC Verification Engineer - RTL, UVM, AI-Driven
Senior ASIC Verification Engineer - RTL, UVM, AI-Driven

Upscale AI • United States

Hybrid
USD 212,000 - 246,000
Lead ASIC RTL Design Engineer
Lead ASIC RTL Design Engineer

10xTalents • San Francisco (CA)

On-site
USD 130,000 - 160,000
Lead AI-Driven ASIC Physical Design Engineer
Lead AI-Driven ASIC Physical Design Engineer

Oho Group • San Francisco (CA)

On-site
USD 180,000 - 260,000