Physical Design Engineer - End-to-End Tape-Out & PPA

TSMC - Taiwan Semiconductor Manufacturing Company Limited; San Jose (CA); On-site; USD 110,000 - 160,000; Full time

Job summary

A leading semiconductor company in San Jose is looking for a Physical Design Engineer with at least 3 years of industrial experience. You will be responsible for driving the physical implementation and tape-out of leading-edge chip designs. The ideal candidate holds a Master's Degree in Electrical Engineering and has hands-on experience with EDA tools. This role offers a competitive salary ranging from $110,000 to $160,000 per year, along with a comprehensive benefits package.

Qualifications

• Master's Degree or higher with strong VLSI-related coursework.
• Minimum 3 years in physical design or related field.
• Hands-on experience with major EDA tools.

Responsibilities

• Drive physical implementation and tape-out of test vehicles.
• Execute design flows from netlist-to-GDS.
• Achieve timing closure and power/signal integrity closure.

Skills

Digital circuit concepts

Expertise in EDA tools

Scripting languages (Python, TCL)

Analytical problem-solving

Communication skills

Education

Master’s Degree in Electrical Engineering or Computer Science

Tools

Synopsys tools (ICC2, DC, Primetime, StarRC)

Cadence tools (Innovus, Virtuoso, SimVision)

Job description

A leading semiconductor company in San Jose is looking for a Physical Design Engineer with at least 3 years of industrial experience. You will be responsible for driving the physical implementation and tape-out of leading-edge chip designs. The ideal candidate holds a Master's Degree in Electrical Engineering and has hands-on experience with EDA tools. This role offers a competitive salary ranging from $110,000 to $160,000 per year, along with a comprehensive benefits package.