Senior SoC PD Engineer - Tapeout, HBM & Equity

1000 Micron Technology, Inc.; Folsom (CA); On-site; USD 177,000 - 334,000; Full time

Benefits offered by this job

Medical, dental, and vision plans

Paid family leave

Paid time-off

Job summary

1000 Micron Technology, Inc. seeks a SoC Physical Design Engineer to lead implementation of advanced HBM SoC designs from netlist to GDSII. The role involves collaboration across various teams to ensure optimal performance, power, and area (PPA).

Applicants should have strong experience in physical design implementation and knowledge of EDA tools. The base salary range is estimated at $177,000 to $334,000 annually, with additional benefits offered.

Qualifications

• Strong experience in SoC physical design from netlist to GDSII.
• Experience with power intent and delivery considerations.
• Proven tapeout history on advanced foundries (e.g., TSMC).

Responsibilities

• Own physical implementation for SoC blocks including floor planning and timing closure.
• Collaborate with design teams for power architecture and integration.
• Support tapeout execution and post-silicon debug.

Skills

SoC physical design implementation

Proficiency with EDA tools (Cadence Innovus, Synopsys ICC2)

Scripting/automation skills (Python, TCL, Perl)

Education

Bachelor’s or Master’s degree in Electrical Engineering or related field

Job description

1000 Micron Technology, Inc. seeks a SoC Physical Design Engineer to lead implementation of advanced HBM SoC designs from netlist to GDSII. The role involves collaboration across various teams to ensure optimal performance, power, and area (PPA).

Applicants should have strong experience in physical design implementation and knowledge of EDA tools. The base salary range is estimated at $177,000 to $334,000 annually, with additional benefits offered.