Physical Design Engineer - Tapeout & PPA Expert

TSMC - Taiwan Semiconductor Manufacturing Company Limited; California (MO); On-site; USD 110,000 - 160,000; Full time

Benefits offered by this job

Comprehensive benefits

Development opportunities

Job summary

A leading semiconductor foundry in California seeks a Physical Design Engineer with 3+ years of experience in VLSI and semiconductor technologies. This role involves driving the end-to-end physical implementation of complex designs and collaborating across teams. Applicants should possess a Master's in Electrical Engineering or related fields, with proficiency in EDA tools like Synopsys and Cadence. A competitive salary range of $110,000–$160,000 is offered, along with comprehensive benefits and development opportunities.

Qualifications

• At least 3 years of industrial experience in physical design or related field.
• Demonstrated expertise in physical design implementation flow.
• Hands-on experience with EDA tools from Synopsys and Cadence.

Responsibilities

• Drive physical implementation and tapeout of test vehicles.
• Execute comprehensive physical design flows from netlist-to-GDS.
• Perform rigorous design signoff verification.

Skills

Digital circuit concepts

Analytical and problem-solving

Collaboration and communication

Scripting languages proficiency

Education

Master’s Degree in Electrical Engineering or Computer Science

Tools

ICC2

DC

Primetime

Cadence Innovus

Cadence Virtuoso

Job description

A leading semiconductor foundry in California seeks a Physical Design Engineer with 3+ years of experience in VLSI and semiconductor technologies. This role involves driving the end-to-end physical implementation of complex designs and collaborating across teams. Applicants should possess a Master's in Electrical Engineering or related fields, with proficiency in EDA tools like Synopsys and Cadence. A competitive salary range of $110,000–$160,000 is offered, along with comprehensive benefits and development opportunities.