ML Hardware Architect — TPU AI Accelerators

Google Inc.; Sunnyvale (CA); On-site; USD 163,000 - 236,000; Full time

Job summary

Google Sunnyvale, CA seeks a Machine Learning Hardware Architect to shape TPU hardware and AI acceleration. You will drive architecture and integration across compiler, system design, and performance teams.

The role involves prototyping features, optimizing power and thermal, and collaborating with ML model teams to support training and inference at scale. Experience in C++/Python and deep learning frameworks is valued.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, a related field, or equivalent practical experience.
• 5 years of experience in computer architecture, chip architecture, IP architecture, co-design, performance analysis, or hardware design.
• Experience in developing software systems in C++ or Python.

Responsibilities

• Create differentiated architectural innovations for Google's TPU roadmap.
• Evaluate power, performance, and cost of prospective architecture and subsystems.
• Collaborate with Hardware Design, Software, Compiler, ML Model and Research teams for hardware/software co-design.
• Work on ML workload characterization and benchmarking.

Skills

Computer architecture

C++

Python

Co-design

Performance analysis

Hardware design

TensorFlow

PyTorch

Education

Bachelor's degree in EE/CE/CS or related field

Master's degree or PhD in Electrical/Computer Engineering or CS

Tools

TensorFlow

PyTorch

Job description

Google Sunnyvale, CA seeks a Machine Learning Hardware Architect to shape TPU hardware and AI acceleration. You will drive architecture and integration across compiler, system design, and performance teams.

The role involves prototyping features, optimizing power and thermal, and collaborating with ML model teams to support training and inference at scale. Experience in C++/Python and deep learning frameworks is valued.