TPU Silicon Test Engineer for AI/ML Hardware

Google; Sunnyvale (CA); On-site; USD 138,000 - 197,000; Full time

Job summary

Google Sunnyvale is seeking a hardware test engineer to shape TPU test strategy and verification for AI/ML hardware accelerators. You will verify complex digital designs, drive post-silicon testing, and collaborate across teams to ensure product integrity.

The role emphasizes collaboration with design, DFT, and quality groups, with responsibilities spanning NPI bring-up, bench testing, and integration with ATE systems from Advantest and Teradyne. US-based interviews include in-person steps.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field.
• 4 years of experience in test engineering or product engineering.
• Experience in ASIC or SoC test development, bring-up, or debug.
• Master's or PhD with focus on computer architecture (preferred).
• Experience with scan/ATPG test development or memory BIST test development.
• Experience testing IPs such as PLLs, PMRO, and sensors.
• Familiarity with ATE from Advantest and Teradyne (EXA scale, UltraFlex+).

Responsibilities

• Develop and drive silicon test requirements with internal design teams and external vendors.
• Support SoC product NPI, bring-up, verification, and qualification, including bench test and yield analysis.
• Leverage ATE experience to drive quality improvements.
• Collaborate with design, DFT, and quality teams for post-silicon testing best practices.
• Provide back-stop support for chip production and test program upgrades.

Skills

ASIC/SoC test development

IP testing (PLLs, PMRO, sensors)

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Master's degree in Electrical Engineering, Computer Engineering or Computer Science

PhD in Electrical Engineering / CS with emphasis on computer architecture

Tools

Advantest EXA scale

Teradyne UltraFlex+

Job description

Google Sunnyvale is seeking a hardware test engineer to shape TPU test strategy and verification for AI/ML hardware accelerators. You will verify complex digital designs, drive post-silicon testing, and collaborate across teams to ensure product integrity.

The role emphasizes collaboration with design, DFT, and quality groups, with responsibilities spanning NPI bring-up, bench testing, and integration with ATE systems from Advantest and Teradyne. US-based interviews include in-person steps.