Memory Packaging Architect for High-Density Systems

Apple, Inc.; San Francisco (CA); On-site; USD 185,000 - 325,000; Full time

Benefits offered by this job

Medical and dental coverage

Retirement benefits

Employee stock plans

Relocation assistance

Job summary

Apple, Inc. in the San Francisco Bay Area is seeking a Memory Packaging Engineer to architect memory solutions that power high-performance hardware. You will help push bandwidth, density, and system integration through careful co-design of memory tech and devices.

You will drive memory package roadmaps, collaborate with electrical, mechanical, and thermal teams, and guide vendor DOEs to ensure quality and reliability across next-generation packages.

Qualifications

• BS in engineering with 10+ years in memory packaging.
• Experience in high-bandwidth and high-density memory packages.
• Strong knowledge of thin-die stacking, wirebond, flip-chip, and wafer/die bonding.

Responsibilities

• Determine the direction of next-generation package architecture by evaluating available and emerging packaging technologies.
• Collaborate with cross-functional teams to solve integration challenges, including electrical, mechanical, and thermal.
• Drive vendor DOEs and failure analysis to improve downstream yield and maintain world-class quality and reliability.
• Define the memory package POR (plan of record): Package form factor, process, layout, stackup, and BOM.
• Drive memory vendors to develop package materials and technology for leading-edge package design rules.

Skills

Memory packaging

Package design

High-bandwidth memory

Cross-functional collaboration

Education

Bachelor's degree

Tools

Test equipment knowledge

Job description

Apple, Inc. in the San Francisco Bay Area is seeking a Memory Packaging Engineer to architect memory solutions that power high-performance hardware. You will help push bandwidth, density, and system integration through careful co-design of memory tech and devices.

You will drive memory package roadmaps, collaborate with electrical, mechanical, and thermal teams, and guide vendor DOEs to ensure quality and reliability across next-generation packages.