Lead Silicon Verification Architect

BayOne Solutions

Sunnyvale (CA)

Hybrid

USD 180,000 - 240,000

Full time

2 days ago
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Benefits offered by this job

Relocation assistance

Job summary

BayOne Solutions in Sunnyvale, CA seeks a Design Verification Manager to lead a silicon verification team. You will architect and drive verification strategies for high-performance SoC products, ensuring robust testbenches, zero-bug tape-outs, and scalable processes.

Lead an elite engineering group across architectures, RTL, and post-silicon validation, champion modern UVM workflows, and mentor engineers to deliver on aggressive schedules while maintaining quality and collaboration across

Qualifications

  • Bachelor's degree in Electrical Engineering, Computer Science, or related field.
  • 10+ years pre-silicon ASIC/SoC verification experience.
  • 5+ years engineering management experience directing teams and schedules.
  • Proven mastery building scalable UVM-compliant testbenches from scratch.

Responsibilities

  • Define global verification strategies, architecture, and execution plans for complex SoC and IP blocks.
  • Lead and mentor a team of verification engineers to deliver high-quality tape-outs.
  • Own testbench architecture from initial specs to structural sign-off and regression ; ensure coverage goals.
  • Collaborate with Architecture, RTL Design, Physical Design, and Post-Silicon validation teams to close coverage gaps.

Skills

SystemVerilog
UVM
Formal Verification
Emulation & Hardware Acceleration
Leadership

Education

Bachelor's degree in Electrical Engineering, Computer Science, or related field

Tools

Palladium
Zebu
Veloce

Job description

BayOne Solutions in Sunnyvale, CA seeks a Design Verification Manager to lead a silicon verification team. You will architect and drive verification strategies for high-performance SoC products, ensuring robust testbenches, zero-bug tape-outs, and scalable processes.

Lead an elite engineering group across architectures, RTL, and post-silicon validation, champion modern UVM workflows, and mentor engineers to deliver on aggressive schedules while maintaining quality and collaboration across

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