Director of SoC Verification & Silicon Validation

Samsung Semiconductor Inc.; San Jose (CA); On-site; USD 219,000 - 351,000; Full time

Benefits offered by this job

Paid time off

Medical/Dental/Vision/401k

Onsite Cafe & gym

Job summary

Samsung Semiconductor Inc. in San Jose seeks a Director of Design Verification to lead end-to-end verification of complex SoCs and manage a high-caliber verification team.

This role drives first-pass silicon success across multiple concurrent projects and collaborates with Architecture, Design, FW, and Validation groups. The ideal candidate has 15+ years in ASIC verification, proven leadership, and expert knowledge in UVM, SystemVerilog, and C++.

Qualifications

• BE (MS preferred) in Computer/Electrical Engineering or Computer Science with 15+ years working experience in ASIC verification.
• Proven leadership in verification team management.
• Experience in multiple successful tape-outs.
• Expert level knowledge of UVM, C++, and SystemVerilog; strong verification flows.

Responsibilities

• Define and implement SoC verification strategy and methodology.
• Lead the team to successful verification signoffs.
• Plan and manage resource across multiple concurrent projects.
• Participate in defining & enhancing development milestones and flows for SoC projects.
• Work closely with Architecture, Design, FW, Validation counterparts to align on verification requirements.
• Provide support in post-silicon bring up and debug.

Skills

Leadership

Tape-outs

Verification strategy

Cross-functional collaboration

Problem solving

Communication

Education

BE/MS in Computer/Electrical Engineering or Computer Science

Tools

UVM

SystemVerilog

C++

Verification tools

Job description

Samsung Semiconductor Inc. in San Jose seeks a Director of Design Verification to lead end-to-end verification of complex SoCs and manage a high-caliber verification team.

This role drives first-pass silicon success across multiple concurrent projects and collaborates with Architecture, Design, FW, and Validation groups. The ideal candidate has 15+ years in ASIC verification, proven leadership, and expert knowledge in UVM, SystemVerilog, and C++.