Sr. RFIC Layout Designer (RFIC Engineering)

SPACE EXPLORATION TECHNOLOGIES CORP; Palo Alto (CA); On-site; USD 180,000 - 250,000; Full time

Job summary

SpaceX is seeking a Sr. RFIC Layout Designer (RFIC Engineering) to lead the discipline of layout across multiple silicon projects.

You will collaborate with RFIC/mixed-signal designers on full-chip layouts of custom analog and RFIC designs for space and ground applications. You will work with cross-disciplinary teams to optimize floorplans, power distribution, and parasitic reduction, while driving design-rule checks and tape-out readiness.

Qualifications

• Bachelor’s degree in electrical or computer engineering with 5+ years IC layout design, or 8+ years experience in lieu of degree.
• Experience with advanced node IC layouts (22nm, 16nm, 7nm, 5nm or below).
• Experience with RF and analog circuit blocks layout and matching techniques.
• Strong communication and collaboration with cross-functional teams.

Responsibilities

• Determine chip floor plan including power and ground distribution and pad locations.
• Estimate layout schedule and identify areas of complexity early.
• Layout custom RF and analog blocks with attention to matching and parasitic minimization.
• Perform DRC/EIR LVS and layout vs schematic checks and resolve errors.
• Integrate top-level layout with ESD structures and pad assembly; support tape-out.

Skills

Analog layout

RFIC layout

Layout verification

Scripting (Python/Perl/Shell)

Education

Bachelor’s degree in electrical or computer engineering

Job description

Sr. RFIC Layout Designer (RFIC Engineering)

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.

At SpaceX we’re leveraging our experience in building rockets and spacecraft to deploy Starlink, the world’s most advanced broadband internet system. Starlink is the world’s largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system – thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We’ve only begun to scratch the surface of Starlink’s potential global impact and are looking for best-in-class engineers to help maximize Starlink’s utility for communities and businesses around the globe.

We are seeking motivated, proactive, and intellectually curious engineers who will work alongside world‑class cross‑disciplinary teams (systems architecture, ASIC design, firmware, pre‑silicon verification, post‑silicon validation, product engineering, manufacturing/production, and more). In this role, you will be on a team working on multiple silicon projects that are driving more integration, lower power, mixed‑signal architectures and advanced silicon technology for deployment in space and ground infrastructures. You will be an integral part of the IC design team and lead the discipline of layout at the technical level, and will work with RFIC/mixed signal designers on full chip layout of custom analog and RFIC designs.

Responsibilities

• Work with the integrated circuit designers and chip leads to determine the chip floor plan; this includes strategies for power and ground distribution as well as working with packaging engineer to determine pad locations
• Accurately estimate the schedule for the layout work and identify areas of complexity that need early investigation
• Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing parasitic capacitance in the layout
• Perform design rule checking, electrical rule checking and layout versus schematic checks and resolve errors
• Perform top‑level layout integration with electrostatic discharge structures and pad assembly and perform final tape out (including density fill, running design for manufacturability checks and sharing GDS with the foundry)
• Work with EDA suppliers to trial new tools and features
• Generate guides and demos for others in the team to showcase improvements in layout technique

Basic Qualifications

• Bachelor’s degree in electrical or computer engineering and 5+ years of professional experience as an IC layout designer; OR 8+ years of professional experience with integrated circuit layout design in lieu of a degree

Preferred Skills and Experience

• Strong analog layout skills
• Experience in advanced node IC layouts such as 22nm, 16nm, 7nm, 5nm or below
• Experience in layout of circuits with frequencies up to 50GHz
• Experience in layout of sensitive RF blocks such as low noise amplifiers, voltage controlled oscillators and mixers
• Experience with skill programming
• Experience with shell scripting, Perl, Python or similar language
• Experience managing revision control systems
• Experience with circuit design
• Understanding of layout considerations for device matching, coupling and noise isolation
• Working knowledge of Linux
• Excellent communication skills (both oral and written) are required
• Able to work independently on challenging problems

Additional Requirements

• Must be willing to work extended hours and weekends as needed to meet critical milestones
• To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.