Lead Physical Design Signoff Engineer

Apple, Inc.; Austin (TX); On-site; USD 190,000 - 240,000; Full time

Job summary

Apple, Inc. is seeking a Physical Design Signoff Engineer to lead the final verification stage of SOC design within the Hardware Tech group. You will own signoff closure for blocks and full-chip designs, coordinating with design and CAD teams to ensure silicon is production-ready.

The role involves defining signoff criteria across timing, power, and integrity, driving signoff reviews, and building automation and dashboards to support verification and throughput under tape-out pressure.

Qualifications

• BS in Computer Science or related field with 10+ years of relevant industry experience
• Proficient in Python, Perl or Tcl

Responsibilities

• Own signoff closure for blocks and full-chip designs.
• Drive signoff reviews with design teams through readiness assessment, closure of open items, and alignment of methodology across groups.
• Develop and maintain the signoff checks, scripts, automation, and dashboards used for verification and metric tracking.

Skills

Python

Perl

Tcl

Education

B.S. in Computer Science or related field

Tools

Cadence Innovus

Synopsys ICC2 / Fusion Compiler

PrimeTime

Tempus

Job description

Apple, Inc. is seeking a Physical Design Signoff Engineer to lead the final verification stage of SOC design within the Hardware Tech group. You will own signoff closure for blocks and full-chip designs, coordinating with design and CAD teams to ensure silicon is production-ready.

The role involves defining signoff criteria across timing, power, and integrity, driving signoff reviews, and building automation and dashboards to support verification and throughput under tape-out pressure.