Lead Mixed-Signal Verification Engineer (RF/SoC)

Apple, Inc.; San Diego (CA); On-site; USD 123,000 - 214,000; Full time

Benefits offered by this job

Medical coverage

Dental coverage

Stock programs

Tuition reimbursement

Relocation assistance

Job summary

Apple, Inc. in San Diego, CA seeks a mixed-signal design verification engineer to verify RF and mixed-signal blocks within the wireless SoC. You will interact with analog/RF design and DV teams, use verification methodologies including GenAI, and own your area with autonomy.

You'll build testbenches, monitors, and RNMs in SystemVerilog, debug failures, improve verification flows, and contribute to tape-out readiness in a dynamic hardware design environment.

Qualifications

• Minimum requirement of a bachelors degree.
• Experience with RF/mixed-signal blocks and SoCs.
• Experience building mixed-signal testbenches, checkers and tests using SystemVerilog
• Strong verification skills in critical thinking, problem solving, testing, and debugging
• Solid understanding of analog/RF circuits such as PLLs, ADCs, RX/TX chains or power delivery
• Great communicator and team collaborator; self-motivated, organized, and eager to take on diverse challenges
• Masters or PhD preferred with 5+ years hands-on experience
• Wireless silicon experience
• Hands-on with real-number analog behavioral models in SystemVerilog
• Interest in GenAI for verification, modeling or debugging
• Experience with UVM methodology
• Experience with UPF, Python or Matlab
• Experience with Virtuoso Composer, ADE, and HED

Responsibilities

• Review specifications and collaborate with the design and system teams to extract features, define and execute verification plans
• Develop top/block level digital/mixed-signal (DMS) testbenches, tests and sequences
• Build and reuse monitors and checkers for RF/mixed-signal blocks
• Debug failures, fix testbench/model/checker issues, manage bug tracking, and analyze and close coverage
• Build SystemVerilog behavioral and real-number models (RNM) of RF and analog blocks (RX, TX, ADC, PLL, power management or clock distribution) and validate them against the schematic design
• Create and improve verification flows and automation, including leveraging GenAI
• Improve our mixed-signal verification methodology with novel ideas

Skills

RF/mixed-signal blocks

SoCs

SystemVerilog

Problem solving

Collaboration

Education

Bachelor's degree

Masters or PhD degree

Tools

UPF

Python

Matlab

Virtuoso Composer

ADE

HED

Job description

Apple, Inc. in San Diego, CA seeks a mixed-signal design verification engineer to verify RF and mixed-signal blocks within the wireless SoC. You will interact with analog/RF design and DV teams, use verification methodologies including GenAI, and own your area with autonomy.

You'll build testbenches, monitors, and RNMs in SystemVerilog, debug failures, improve verification flows, and contribute to tape-out readiness in a dynamic hardware design environment.