Mixed-Signal Verification Engineer (Analog/RF)

Apple, Inc.; Sunnyvale (CA); On-site; USD 129,000 - 225,000; Full time

Benefits offered by this job

Medical benefits

Stock programs

Education reimbursement

Job summary

Apple, Inc. in Sunnyvale is seeking a Design Verification Engineer to own RNM/SystemVerilog behavioral modeling and verification of analog/RF blocks inside a large SoC.

You will work with analog designers, build self-checking models, create assertions, and set up AMS simulations. The role offers a competitive base pay with comprehensive benefits, including stock programs and education support.

Qualifications

• Minimum requirement of a bachelor's degree.
• Strong fundamentals in analog/RF circuit theory/topologies.
• Experience with RNM coding in SystemVerilog.

Responsibilities

• Development of RNM RF/Analog models in SystemVerilog.
• Develop models with self-checking techniques.
• Assess required model accuracy level depending on verification goals.
• Develop appropriate assertions to ensure analog/digital specs are respected and provide digital verification passing criteria.
• Work with Analog designers setting up AMS simulation environment.
• Debug complex chip digital-on-top testbenches and seek root causes for failures.

Skills

RNM/SystemVerilog coding

Analog/RF theory

AMS verification experience

Education

Bachelor's degree

Tools

Cadence mixed signal verification environment

Job description

Apple, Inc. in Sunnyvale is seeking a Design Verification Engineer to own RNM/SystemVerilog behavioral modeling and verification of analog/RF blocks inside a large SoC.

You will work with analog designers, build self-checking models, create assertions, and set up AMS simulations. The role offers a competitive base pay with comprehensive benefits, including stock programs and education support.