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Celero Communications, Inc. in Irvine, CA seeks a Principal High-Speed Analog Circuit Design Engineer to architect and deliver high-speed transceiver analog blocks and overall mixed-signal designs for next-generation interconnect technology.
You will lead analog layout supervision, verify circuits, and collaborate with design teams across CMOS processes. A Master’s or PhD and 5+ years in analog design are required, with hands-on CAD and EM tools.
Celero Communications, Inc. in Irvine, CA seeks a Principal High-Speed Analog Circuit Design Engineer to architect and deliver high-speed transceiver analog blocks and overall mixed-signal designs for next-generation interconnect technology.
You will lead analog layout supervision, verify circuits, and collaborate with design teams across CMOS processes. A Master’s or PhD and 5+ years in analog design are required, with hands-on CAD and EM tools.