Principal High-Speed Analog Circuit Design Engineer

Celero Communications, Inc.; United States; Remote; USD 200,000 - 300,000; Full time

Job summary

Celero Communications, Inc. in Irvine, CA seeks a Principal High-Speed Analog Circuit Design Engineer to architect and deliver high-speed transceiver analog blocks and overall mixed-signal designs for next-generation interconnect technology.

You will lead analog layout supervision, verify circuits, and collaborate with design teams across CMOS processes. A Master’s or PhD and 5+ years in analog design are required, with hands-on CAD and EM tools.

Qualifications

• Master’s degree and/or PhD in Electrical Engineering.
• 5+ years of experience in analog circuit design.

Responsibilities

• High speed analog circuit design for transceivers and related blocks.
• Design of VCOs, PLLs and clock distribution networks.
• Supervise analog layouts in advanced process nodes.
• System verification and circuit design specification creation.
• Silicon bring-up, debugging and support.
• Team communication and documentation.

Skills

Analog design fundamentals

Broadband amplification

Clock generation and distribution

Circuit verification

Education

Master’s degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Virtuoso

Spectre

ADE

Post-layout extraction tools

EMX

Momentum

HFSS

Job description

Irvine, CA

Principal High-Speed Analog Circuit Design Engineer

About the job

Are you an Analog Design Engineer, who is seeking an amazing opportunity delivering disruptive High Speed Interconnect Technology powering next generation AI? We are looking for an Analog Design Engineer – someone who is excited to join a fast-growing Start-Up Company growing a group of diverse individuals responsible for handling high-speed mixed-signal circuit designs! Candidate will have the opportunity to architect and design circuits for high-performance transceivers and other critical analog functions.

What You Will Do

• High speed analog circuit design, such as high-speed broadband amplifiers (VGA, CTLE, DRV, etc.)
• Clock generation and distribution (VCOs, PLL, clock distribution, etc.)
• Fundamental analog blocks (bandgap references, LDOs, temp sensors, etc.)
• New techniques for the development of next generation optical transceiver
• Design of custom passive components, from concept to silicon implementation
• Supervise analog layouts within advanced process nodes
• System verification and circuit design spec creation
• Silicon bring-up, debug and support
• Team communication and documentation

What You Will Bring

• Master’s degree and/or PhD in Electrical Engineering or related fields with 5+ years of experience
• Should have strong analog design fundamentals and experience in designing analog circuit blocks for broadband amplification, clock generation and distribution, and/or fundamental analog blocks
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must
• Experience in advance CMOS design and verification flows (tools to evaluate self-heating, electromigration, safe operating area)
• Experience with electromagnetic simulation tools (EMX, Momentum, HFSS or other) is a plus
• Knowledge of the fundamentals on electromagnetism, lump models, and high frequency design
• Good understanding of analog layouts in FinFET and its effect on high-speed designs is a plus
• Strong communication and documentation skills

Annual Base Salary Range

$200,000 - $300,000 (The final offer will be determined based on job-related skills, experience, qualifications, and location.)

Javier Leon
Talent Acquisition
619-227-3193 cell/text
[e-mail]
www.celero.inc