Senior Analog Design Engineer - High-Speed Transceivers

Celero Communications, Inc.; Irvine (CA); On-site; USD 150,000 - 250,000; Full time

Job summary

Celero Communications, Inc. seeks an Analog Design Engineer to drive high-speed interconnect technology for AI infrastructure. You will architect, design, and deliver high-performance analog and mixed-signal circuits for transceivers and other critical high-speed functions from architecture through silicon.

You will join a world-class engineering team tackling challenging design problems in advanced process technologies, contributing to silicon bring-up, debug and documentation in Irvine, CA.

Qualifications

• Master's degree and/or PhD in Electrical Engineering with 5+ years of experience.
• Strong analog design fundamentals for broadband amplification, clock generation and distribution, and fundamental analog blocks.
• Experience with analog design and verification tools (Virtuoso, Spectre, ADE, and post layout extraction tools) is a must; knowledge of CMOS design and verification flows.

Responsibilities

• High speed analog circuit design for broadband amplification (VGA, CTLE, DRV, etc.).
• Clock generation and distribution (VCOs, PLL, clock distribution).
• Design of fundamental analog blocks (bandgap references, LDOs, temp sensors).
• Design of next-gen optical transceiver approaches.
• Supervise analog layouts within advanced process nodes.
• System verification and circuit design specification creation.

Skills

Analog circuit design

Clock generation & distribution

System verification

Analog layout supervision

Documentation & communication

Education

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Virtuoso

Spectre

ADE

Post-layout extraction tools

Job description

Celero Communications, Inc. seeks an Analog Design Engineer to drive high-speed interconnect technology for AI infrastructure. You will architect, design, and deliver high-performance analog and mixed-signal circuits for transceivers and other critical high-speed functions from architecture through silicon.

You will join a world-class engineering team tackling challenging design problems in advanced process technologies, contributing to silicon bring-up, debug and documentation in Irvine, CA.