Lead Front-End RTL Architect for AI Chiplet SoC

Vertical Compute SRL; United States; Remote; USD 140,000 - 210,000; Full time

Job summary

Vertical Compute is seeking a Front-End RTL Designer to lead top-level SoC and chiplet integration, uniting internal and external IPs to build high-performance AI accelerators. You will integrate VIM technology with compute engines to maximize throughput and bandwidth.

You will collaborate with verification and physical design teams to ensure robust RTL verification, timing closure, and optimized Power, Performance, and Area for the AI accelerator platform.

Qualifications

• Proven experience in front-end RTL design and top-level SoC/chiplet integration.
• Strong skills in SystemVerilog/Verilog and IP integration across teams.
• Ability to collaborate with verification and physical design to optimize PPA.

Responsibilities

• Lead top-level SoC and chiplet integration with internal and external IPs.
• Integrate VIM technology with compute engines to maximize throughput and bandwidth.
• Collaborate with verification to build robust RTL verification environments.
• Work with physical design to optimize Power, Performance, and Area (PPA).

Skills

RTL design

SoC integration

IP integration

SystemVerilog

Digital design

Education

B.S./M.S./Ph.D. in Electrical Engineering

Job description

Vertical Compute is seeking a Front-End RTL Designer to lead top-level SoC and chiplet integration, uniting internal and external IPs to build high-performance AI accelerators. You will integrate VIM technology with compute engines to maximize throughput and bandwidth.

You will collaborate with verification and physical design teams to ensure robust RTL verification, timing closure, and optimized Power, Performance, and Area for the AI accelerator platform.